The present invention relates to a comparator and, more particularly, to a chopper type comparator for use in an analog-to-digital converter or the like.
A chopper type comparator for the above application is disclosed in, for example, Japanese Patent Laid-Open Publication No. 63-80617. A chopper type comparator has a simple construction consumes a minimum of power because there is no current that constantly flows therethrough. However, the problem with this type of comparator is that it is susceptible to noise due to a single end configuration thereof. On the other hand, a differential chopper time comparator using a full differential amplifier is proposed in "IEEE Journal of Solid-State Circuits", Vol. SC-20, No. 3, June 1985, pp. 775-779. With the differential chopper type comparator, it is possible to cancel noise of the same phase. However, because current constantly flow through the full differential amplifier, the comparator consumes much power. Moreover, should the power source voltage be lowered in order to lower power consumption, the gain of the differential amplifier and, therefore, resolution would be deteriorated. A similar comparator is taught in "1979 IEEE International Solid-State Circuits Conference", Feb. 15, 1979, pp. 126-127.